PP
Publications
- Where replacement algorithms fail: A thorough analysis
- Measuring QoE of interactive workloads and characterising frequency governors on mobile devices
- Modeling cache sharing on chip multiprocessor architectures
- Synthesizing benchmarks for predictive modeling
- Preventing denial-of-service attacks in shared CMP caches
- Instruction-based reuse-distance prediction for effective cache management
- Fast automatic heuristic construction using active learning
- Efficient microarchitecture policies for accurately adapting to power constraints
- Using value locality to reduce memory encryption overhead in embedded processors
- Minimizing the cost of iterative compilation with active learning
- MLP-aware instruction queue resizing: The key to power-efficient performance
- Power capping: What works, what does not
- Cache replacement based on reuse-distance prediction
- ALEA: A fine-grained energy profiling tool
- Active learning accelerated automatic heuristic construction for parallel program mapping
- Effective Function Merging in the SSA Form
- Collaborative Heterogeneity-Aware OS Scheduler for Asymmetric Multicore Processors
- Developer and user-transparent compiler optimization for interactive applications
- HyFM: function merging for free
- POSTER: A collaborative multi-factor scheduler for asymmetric multicore processors
- Function Merging by Sequence Alignment
- Compiler fuzzing through deep learning
- End-to-End Deep Learning of Optimization Heuristics
- Quff: A Dynamically Typed Hybrid Quantum-Classical Programming Language